Description
You will be part of an R&D team developing high-speed analog and mixed-signal layout. As a Layout Design Engineer at Synopsys, you will leverage your strong understanding of EDA tools, advanced nodes, and layout, as well as knowledge of ESD and latch-up. You will work with a cross-functional layout team of analog and digital layout designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.
Responsibilities:
- Design top-level layout with advanced process nodes.
- Provide solutions for difficult ESD/latch-up/ANT issues in layout.
- Stick to workflow and deliver database with high quality.
- Take part in analog layout and design communication, detecting problems.
- Discuss and exchange skill sets with global designers.
Requirements:
- Bachelor's degree or above.
- Major in Microelectronics, Electronic Engineering, or Electronic-related fields.
- Mastering in using EDA tool for layout drawing.
- Proficient in top-level floorplan and connection.
- Adept at ESD/latch-up and solve related problems.
- Use English to communicate with layout designers from global sites.
Preferred experience:
- 3+ years of experience in layout design.
- Knowledge of advanced nodes.
- SoC level experience is prior.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://careers.synopsys.com/job/wuhan/layout-design-engineer/44408/93917039648