Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.
You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.
You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.
You will participate in code reviews and technical discussions to drive innovation and continuous improvement.
You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.
You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.
You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.
To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.
You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.
You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.
Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.