Description
We are seeking a skilled Layout Design, Sr Engineer to join our team in Da Nang. As a Layout Design, Sr Engineer, you will be responsible for designing and integrating memory leafcells and standard cell layouts, optimizing layouts for speed, area, and power, and collaborating with circuit and verification engineers.
What you'll do
- Designing and integrating memory leafcells and standard cell layouts.
- Optimizing layouts for speed, area, and power.
- Running and debugging DRC, LVS, and ERC checks.
- Collaborating with circuit and verification engineers.
What you need
- 2+ years in custom, standard cell, or memory layout design.
- Experience with FinFET, DRC, LVS, ERC, and boundary conditions.
- Proficiency in Custom Compiler, ICV, and scripting (Perl, Shell, TCL).
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://careers.synopsys.com/job/da-nang/layout-design-sr-engineer-in-da-nang/44408/91405850624