Digital Verification Manager

We are seeking a highly skilled Digital Verification Manager to lead our ASIC digital verification team. The successful candidate will have extensive experience in ASIC digital verification, particularly with HBM (or DDR/LPDDR) protocols, and will be responsible for creating and maintaining testbenches using SystemVerilog and UVM methodologies.

What you'll do

• Leading and managing a team of ASIC Digital Verification engineers, providing guidance and mentorship;
• Creating and maintaining testbenches using SystemVerilog and UVM methodologies;

What you need

• Extensive experience in ASIC digital verification, particularly with HBM (or DDR/LPDDR) protocols;
• Proficiency in SystemVerilog, UVM, and other verification tools and methodologies;