Description
We are seeking a top SOC Verification Engineer to verify the design and implementation of the world's leading networking SoCs. In this position, you will craft complex networking chips and interact directly with architects, designers, and software engineers across sites. This is your chance to shape the future of computing with a world-class team!
Responsibilities: Verify the design and implementation of SOC technologies in various projects. Craft complex networking chips. Interact directly with architects, designers, and software engineers across sites. Collaborate with emulation, production testing, and silicon verification teams.
Requirements: BSc. in Electrical Engineering or Computer engineering. 2+ years of relevant experience. Good understanding of RTL design (Verilog). Experience of UVM methodology. Strong debugging, problem solving, and analytical skills. Excellent communication and social skills. Ability to work in a geographically diverse team environment. Self-motivated, independent, and target-oriented.
Nice to Have: Previous experience in SOC and/or verification. Experience in developing verification environments and random-based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy). Background with SV/UVM and Python.