Description
NVIDIA is seeking a Senior Implementation Methodology Engineer for its VLSI team. The role involves leading synthesis methodology development in the RTL2GDS pipeline and supporting advanced-node chip development.
The engineer will own and continuously improve the end-to-end RTL2GDS implementation methodology, covering synthesis, place & route, CTS, and equivalence checking for advanced-node CPU builds.
Key responsibilities:
- Evaluate new EDA tools and process node capabilities, delivering adoption recommendations
- Serve as a technical liaison between internal teams and EDA vendors like Synopsys and Cadence
- Define and enforce implementation methodology standards across development teams
- Build and complete experiments to compare flows, engine settings, and optimization strategies
- Drive aggressive PPA targets throughout the full implementation cycle
- Architect and build automation frameworks to reduce manual engineering effort
- Identify and eliminate systemic efficiency bottlenecks across the implementation flow
- Partner with various teams to surface PPA opportunities early
Requirements:
- BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 6+ years of hands-on experience in ASIC implementation methodology and EDA tool/flow development
- Deep expertise in the complete RTL2GDS flow
- Proficiency with EDA tools from Synopsys and/or Cadence
- Strong scripting skills in Python, TCL, Perl, and/or Make
- Demonstrated ability to drive complex technical initiatives
- Excellent problem-solving, debugging, and analytical skills
NVIDIA offers highly competitive salaries and a comprehensive benefits package.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Implementation-Methodology-Engineer_JR2019722