System Verification Co-Design Engineer - Speed and Rel

As a System Verification Co-Design Engineer, you will work on system-level speed features, develop verification collateral and automation infrastructure to characterize and validate them, and lead debug of complex silicon issues.

Responsibilities:

• Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products.
• Understand system-level behavior and speed reliability margins, bounding box constraints, and identify solutions that optimize margins.
• Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows.
• Perform closed-loop validation by correlating silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs.
• Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency.
• Design and implement automation tools for system speed modeling; apply AI and LLM-assisted workflows to compress characterization and debug cycles.
• Architect and influence testability features critical to performance, power, and reliability in partnership with design, DFx, and ATE teams.
• Lead debug of complex silicon and system-level issues, including show-stopper defects, to enable on-time product shipment.

Requirements:

• MS in EE, CE, Systems Engineering, or equivalent experience.
• 4+ years of experience in a related hardware engineering role.
• Hands-on experience with silicon bring-up, frequency and power characterization, PPA analysis in pre- and post-silicon phases, System/Platform level understanding, tester-to-system correlation, and lab instrumentation.
• Scripting proficiency in Python and/or Perl; comfortable in Windows, Linux, and Android environments.
• Familiarity with statistical methods and data analysis tools.
• Demonstrated use of AI or LLM-based tools in an engineering workflow.

Benefits:

• Competitive salaries
• Generous benefits package
• Equity eligibility