Senior Physical Design Engineer

We are seeking a Senior Physical Design Engineer to join our team working on industry-leading GPUs and SOCs. In this position, you will lead all block/chip level PD activities, including floor plans, abstract view generation, RC extraction, PNR, STA, EM, IR DROP, DRCs & schematic to layout verification.

You will work in collaboration with the design team to address design challenges, help team members debug tool/design related issues, and constantly look for improvements in the RTL2GDS flow to improve PPA.

Responsibilities:

• Lead all block/chip level PD activities
• Collaborate with design team to address design challenges
• Help team members debug tool/design related issues
• Improve RTL2GDS flow to enhance PPA

Requirements:

• BE/BTECH/MTECH or equivalent experience
• 4+ years of experience in Physical Design
• Strong understanding of RTL2GDSII flow or design implementation in leading process technologies
• Expertise on high frequency design methodologies
• Good knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification

Preferred Qualifications:

• Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows
• Well-versed with timing constraints, STA and timing closure
• Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools