Description
NVIDIA is looking for exceptional engineers to advance our verification methodology and efficiently validate some of the world's most complex designs. In this role, you will make a tangible impact within a fast-paced, technology-driven company whose products span consumer graphics, autonomous vehicles, and the rapidly expanding field of artificial intelligence.
You will be part of a world-class team of talented individuals across the globe, united by a shared mission: to push the boundaries of what is possible today and define the future platform of computing.
Responsibilities
- Verify custom analog macros to ensure design correctness and reliability
- Partner with Design, Integration, and Test Engineering teams to define verification scope, develop strategies, implement test plans, and verify designs at the IP, cluster, and full-chip levels
- Collaborate with the CAD team to optimize and streamline our simulation flow
- Generate test patterns and support chip bring-up activities
Requirements
- Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
- 1-3 years of experience in DFT or digital design
- Strong debugging and analytical skills using RTL/gate-level design tracing tools (e.g., Verdi) and verification simulation tools (e.g., VCS)
- Familiarity with SoC fundamental architecture (clock, reset, power rail, I/O pad, package)
Preferred Qualifications
- Understanding of Design-for-Test methodologies including Scan, ATPG, BIST, and JTAG
- Proficiency in one or more scripting/programming languages: Python, Perl, Tcl, C, or C++
- Fluent English communication skills (written and verbal)
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Taipei/SoC-Verification-Engineer_JR2020901