Description
We are seeking a highly skilled and motivated Product Development engineer to drive bring-up of state-of-the-art SOCs through collaboration with external vendors, design and production teams.
Responsibilities:
- Lead wafer-level and package-level NPI bring-up for silicon programs, including first silicon debug, characterization, and yield ramp.
- Serve as the primary technical interface between ATE and internal partners for test strategy, ATE bring-up, and silicon qualification.
- Define and drive PDE Silicon characterization plans covering key tests and features.
- Analyze product yield limiters, drive failures on Automatic Test Equipment (ATE) at wafer and package level.
- Characterize different aspects of performance and power.
- Lead multi-functional efforts with design, foundry, quality, test, customers, and suppliers.
- Influence next-gen products by collaboration with architecture, software, and test teams.
Requirements:
- Bachelor's degree in Electrical Engineering (or equivalent experience) and 5+ years of relevant experience.
- Analytical and problem-solving skills, especially in troubleshooting test failures and optimizing test coverage.
- Experience with porting functional workloads to an automated test environment.
- Exposure to both Teradyne and Advantest platforms is a plus.
We offer competitive salaries, a generous benefits package, equity, and opportunities to build the future with us.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Product-Development-Engineer_JR2019732