New The Skills of Tomorrow: how AI-exposed is every skill in 2026? See the data →
Synopsys

ASIC Digital Design, Sr Manager

Synopsys
Apply →
onsite senior full-time Bengaluru

First indexed 24 Apr 2026

Description

We are seeking an experienced ASIC Digital Design Manager with strong hands-on expertise in PCIe digital design and architecture to lead a team of ASIC digital design engineers. As a Senior Manager, you will be responsible for owning PCIe digital architecture and RTL design execution, defining micro-architecture, design specifications, and implementation approaches for high-performance, power-efficient, and scalable PCIe designs. You will also serve as the PCIe technical architect for the team, guiding key design decisions and resolving complex technical issues.

Key Responsibilities:

  • Leading and managing a team of ASIC digital design engineers, providing day-to-day technical guidance, mentoring, and performance management.
  • Owning PCIe digital architecture and RTL design execution, remaining hands-on while leading design efforts at block, subsystem, and IP-integration levels.
  • Defining micro-architecture, design specifications, and implementation approaches for high-performance, power-efficient, and scalable PCIe designs.
  • Leading end-to-end digital design activities, including architecture definition, RTL development, debug, design convergence, and post-silicon support.
  • Serving as the PCIe technical architect for the team, guiding key design decisions and resolving complex technical issues.

Requirements:

  • Bachelor's degree in Electrical Engineering (BSEE) with 12+ years of experience, or Master's degree (MSEE) with 10+ years.
  • Demonstrated experience as a team lead or people manager in an ASIC digital design environment.
  • Extensive hands-on ASIC RTL design experience, with direct ownership of complex digital designs.
  • Deep expertise in PCIe digital design and architecture; experience with CXL, DDR, AMBA, UCIe, or related protocols is highly desirable.
  • Strong understanding of ASIC design fundamentals including clocking, resets, low-power techniques, and design for test.
  • Proven ability to define PCIe micro-architecture and drive designs from concept through silicon.
  • Experience with AI-driven tools, flows, and methodologies. Familiarity with scripting languages (Perl, TCL, Python) for design automation is a plus.

Preferred Qualifications:

  • A hands-on PCIe architect who enjoys leading by technical example.
  • Comfortable balancing design execution with team leadership responsibilities.
  • A clear communicator who works effectively across engineering disciplines.
  • A collaborative leader who values quality, ownership, and knowledge sharing.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/bengaluru/asic-digital-design-sr-manager/44408/93996748480