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Synopsys

SerDes Analog Design Engineer, Sr Staff

Synopsys
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senior employee Seongnam-si, Gyeonggi-do

First indexed 23 Jul 2026

Description

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

We're looking for a highly motivated Analog Circuit Design Engineer to join our team! You are a highly motivated Analog Circuit Design Engineer with a passion for creating ground-breaking technology. You possess an in-depth understanding of analog and mixed-signal building blocks, especially in the context of SerDes designs.

Responsibilities:

  • Ensuring analog sub-block performance adheres to SerDes standards and architecture document specifications.
  • Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.
  • Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design.
  • Overseeing physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Partnering with digital RTL engineers on the verification of calibration, adaptation, and control algorithms for analog circuits.
  • Presenting simulation data for peer and customer review.
  • Taking ownership of analog and mixed-signal building blocks that are integrated as part of a larger SerDes design.
  • Documenting design features and test plans.
  • Consulting on the electrical characterization of your circuit within the SerDes IP product.

The Impact You Will Have:

  • Driving innovation in high-speed analog design, pushing the boundaries of SerDes technology.
  • Contributing to the development of silicon-proven IP solutions that reduce integration risk and accelerate time-to-market.
  • Enhancing the performance and reliability of Synopsys' IP portfolio, ensuring it meets the highest industry standards.
  • Collaborating with cross-functional teams to deliver robust and efficient designs.
  • Improving design methodologies and verification strategies to streamline development processes.
  • Providing expert insights that influence the future direction of analog circuit design at Synopsys.

Requirements:

  • Ph.D. with 5+ years, or MSc with 10+ years of SerDes/High-Speed analog design experience.
  • Familiarity with the transistor-level circuit design of fundamental analog and mixed-signal building blocks.
  • Silicon-proven experience implementing circuits for analog and mixed-signal building blocks.
  • Design experience with some of the following SerDes sub-circuits: receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC.
  • Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.
  • Awareness of ESD issues and design for reliability.
  • Experience with EDA tools for schematic entry, physical layout, and design verification.
  • Knowledge of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB.

Benefits:

  • Comprehensive medical and healthcare plans
  • Time away programs
  • Family support
  • ESPP
  • Retirement plans
  • Competitive salaries
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/seongnam-si/serdes-analog-design-engineer-sr-staff/44408/98136037824