Description
NVIDIA is seeking a Senior ASIC Design Efficiency Engineer to join their team. As an ASIC Design Efficiency Engineer, you will have the opportunity to design hardware accelerators and processors on next-generation mobile, embedded, and datacenter platforms. This position offers the chance to make a real impact in a multifaceted, technology-focused company affecting product lines ranging from consumer graphics to self-driving cars and artificial intelligence.
Responsibilities:
- Develop innovative hardware, GPU, and system designs to extend the state-of-the-art performance and efficiency.
- Understand design and implementation, and develop methodology and infrastructure to drive Performance, Power, and Area (PPA) improvements.
- Execute and deliver fully verified, high-performance, area- and power-efficient RTL to achieve design targets.
- Collaborate with architects, designers, verification, and VLSI teams to craft top-performing GPUs.
Requirements:
- Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent experience.
- 12+ years of experience.
- Proficiency in SystemVerilog or similar HDL.
- Solid understanding of logic design and computer architecture.
- Strong interpersonal skills and ability to work in a diverse product-oriented team.
Preferred Qualifications:
- Experience with pipeline processor or deep learning accelerator design/architecture.
- Experience with performance verification, low power, or physical (synthesis/VLSI) design.
- Scripting knowledge in Python/Perl.
You will also be eligible for equity and benefits.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-ASIC-Design-Efficiency-Engineer_JR2022622