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NVIDIA

Senior ASIC Design Engineer - NOC IP

NVIDIA
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onsite senior full-time Bengaluru

First indexed 18 May 2026

Description

We are seeking a Senior ASIC Design Engineer to join our Graphics team. As a key member of our team, you will be responsible for designing state-of-the-art memory subsystem components used in our industry-leading Graphics Processors. Your work will have a real impact on product lines ranging from consumer graphics to self-driving cars and artificial intelligence.

In this position, you will make architectural trade-offs based on features, performance requirements, and system limitations. You will develop micro-architecture and RTL, collaborate with architects, designers, verification teams, synthesis, timing, and backend teams to deliver a fully verified, synthesis/timing clean design.

Key responsibilities include:

  • Owning micro-architecture and RTL development of design modules
  • Micro-architecting features to meet performance, power, and area requirements
  • Working with HW architects to define critical features
  • Collaborating with verification teams to verify the correctness of implemented features
  • Cooperating with timing, VLSI, and physical design teams to ensure design meets timing, interface requirements, and is routable
  • Interacting with FPGA and S/W teams to prototype the design and ensure that S/W is tested
  • Working on post-silicon verification and debug

Requirements include:

  • B.S./M.S. or equivalent experience
  • 7+ years of design experience
  • Experience in RTL design of complex design units for at least two or three projects
  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug
  • Expertise in Verilog

To stand out from the crowd, consider having experience in:

  • Design experience in memory subsystem or network interconnect IP
  • Good debugging and problem-solving skills
  • Scripting knowledge (Python/Perl/shell)
  • Leadership experience in leading small 2-3 member teams
  • Good interpersonal skills and ability & desire to work as a part of a team
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/India-Bengaluru/Senior-ASIC-Design-Engineer---NOC-IP_JR1998309