Senior Design Engineer - Memory Subsystem

NVIDIA is seeking a Senior Design Engineer to work on the design of state-of-the-art memory subsystem components used in their industry-leading GPUs and SOCs.

In this position, you will be responsible for making architectural trade-offs based on features, performance requirements, and system limitations, coming up with micro-architecture, implementing in RTL, and delivering a fully verified, synthesis/timing clean design.

Responsibilities:

• Own micro-architecture and RTL development of design modules.
• Micro-architect features to meet performance, power, and area requirements.
• Work with HW architects to define critical features.
• Collaborate with verification teams to verify the correctness of implemented features.
• Interact with timing, VLSI, and Physical design teams to ensure design meets timing, interface requirements, and is routable.
• Co-operate with FPGA and S/W teams to prototype the design and ensure that S/W is tested.
• Work on post-silicon verification and debug.

Requirements:

• BS/MS or equivalent experience.
• 4+ years of design experience.
• Experience in micro-architecture and RTL development of complex designs.
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
• Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, timing analysis, floor-planning, ECO, bring-up & lab debug.
• Expertise in Verilog.

Nice to Have:

• Design experience in memory subsystem or network interconnect IP.
• Good debugging and problem-solving skills.
• Scripting knowledge (Python/Perl/shell).
• Good interpersonal skills and ability & desire to work as part of a team.