Applications Engineering, Architect

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You are a passionate and driven professional with a profound mastery of hardware-assisted verification (HAV), using emulation and FPGA prototyping methodologies, with a sharp focus on performance optimization. Your expertise covers the entire lifecycle of HW/SW product development, from early RTL verification to software bring up and platform delivery.

What You'll Be Doing:

• Architecting custom emulation methodologies using ZeBu to solve high-value problems for customers.
• Serving as the primary technical interface for debugging and resolving issues in ZeBu flow/methodology.
• Providing technical leadership and product evaluation support to key emulation customers globally.
• Leading comprehensive root cause analyses to resolve and prevent emulation performance bottlenecks.
• Ensuring the highest standards of verification for SoC designs, contributing to the creation of robust and reliable products.
• Collaborating with internal R&D teams to define product requirements and validate new tool features based on real-world customer usage.

The Impact You Will Have:

• Elevating emulation runtime performance through the development and deployment of cutting-edge technologies.
• Delivering effective root cause analysis that drives measurable improvements in performance and customer satisfaction.
• Enhancing verification processes for SoC designs, ensuring the delivery of high-quality, reliable silicon products.
• Building strong, collaborative relationships that drive customer success and foster innovation.
• Contributing to the global deployment of advanced performance technologies in ZeBu platforms.
• Driving a culture of continuous innovation and technical excellence within the team and broader organization.

What You'll Need:

• Minimum 15+ years of experience in emulation methodology, spanning early RTL verification to software bring up.
• Proven expertise in verification, with a focus on System on Chip (SoC) design bring-up and validation.
• Comprehensive knowledge of the architecture of emulation/FPGA prototyping platforms and their ecosystems.
• A good understanding of the compilation and runtime flows on these emulation platforms.
• Demonstrated experience in using debug features of these emulation platforms, and in conducting root cause analysis for emulation runtime performance issues.
• Strong collaborative skills, with a track record of working effectively with cross-functional teams to drive product and customer success.
• Proficient with HDL (Verilog/VHDL), HVL(e/vera/SystemVerilog), C/C++, Unix, and having a strong understanding of ASIC design flows, VLSI, and/or CAD-engineering.
• Experience on VMM/OVM/UVM and knowledge of simulator-emulator co-emulation are preferred.