Verification Engineer - Memory Subsystem

NVIDIA is seeking a Verification Engineer - Memory Subsystem to join their Graphics Engineering team. The successful candidate will verify powerful memory subsystem IPs used in industry-leading Graphics Processors.

Job Description:

The role involves verifying the design, architecture, and micro-architecture of memory subsystems using sophisticated verification methodologies. The engineer will develop verification infrastructure components, define verification scope, and work on functional coverage-driven verification closure.

Key Responsibilities:

• Verify design, architecture, and micro-architecture using advanced verification methods
• Develop verification infrastructure components using UVM methodology
• Define verification scope and develop test plans
• Collaborate with cross-functional teams for innovative solutions

Requirements:

• BS/MS in EE/ECE with 2+ years of experience
• Experience in verifying complex IPs/sub-systems
• Expertise in industry-standard verification flows like SV random testing, UVM, FV, and coverage metrics
• Strong coding skills in SV
• Good problem-solving and communication skills

Preferred Qualifications:

• Prior experience with memory subsystem/network interconnect IPs
• Familiarity with memory subsystem concepts like cache coherency and high-speed IO protocols
• Scripting skills in Perl or Python

What NVIDIA Offers:

• Opportunity to work on cutting-edge technology
• Collaborative and dynamic work environment
• Recognition as a leader in the technology industry