Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are a highly experienced engineering professional, passionate about ASIC design methodologies and IP reuse. With at least 3 years of solid experience in IP and SoC design and/or verification. You have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting and working within an AI/EDA ecosystem.
You possess deep hands-on knowledge of ASIC design tools, languages and methodologies. Your expertise enables you to design reference flows and scalable methodologies that empower teams and accelerate project success.
You excel at independently, owning and delivering on complex assignments, while also being a collaborative team player. Your communication skills are outstanding, allowing you to articulate technical concepts to diverse audiences and influence cross-functional teams. You have a proven ability to multi-task, manage priorities, and drive technical initiatives with a strategic mindset.
Your academic foundation includes a bachelor’s degree in electronics, electrical, or computer engineering, and you continuously seek to expand your knowledge and impact in the field of ASIC design. You are ready to take on a leadership role, shaping methodology and best practices for the next generation of high-performance silicon designs.
Applying AI techniques to accelerate front-end design methodology – leveraging internal and/or external agentic AI tools. Supporting IP teams and internal stakeholders by troubleshooting, optimizing, and debugging design processes and flows. Implementing reference front-end flows for Synopsys digital IP and mixed-signal IPs. Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables. Collaborating closely with tool and IP development teams to influence product evolution and optimize workflows for maximum efficiency.
Elevate Synopsys’ IP capabilities by delivering robust, unified, and scalable methodology solutions. Empower global IP teams with best-in-class flows, tools, and practices, driving consistent project success. Mentor and develop the next wave of ASIC design engineers, fostering a culture of learning and technical excellence. Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions. Enhance Synopsys’ leadership position in the semiconductor industry through continuous improvement and adoption of cutting-edge methodologies.