Description
We are looking for a highly skilled ASIC Verification Engineer to join our team. As an ASIC Verification Engineer, you will be responsible for verifying our global IP across multiple products. You will partner with the design and architecture teams to help make the right implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off design or both functional correctness and for meeting performance expectations.
Your responsibilities will include:
- Developing test plans, tests and verification infrastructure for verifying global IP across multiple products
- Defining, developing, and automating flows and methodologies to efficiently build, deploy, and verify generated RTL
- Ensuring code and functional coverage of all the RTL which you will verify
- Building verification components using SV/UVM methodology
- Driving coverage-based verification closure
- Collaborating with design teams across NVIDIA to find corner cases and resolve verification related issues
To be successful in this role, you will need:
- A Bachelor's or Master's degree in Electrical or Computer Engineering (or equivalent experience)
- 2+ years of proven design verification experience
- Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
- Programming and scripting experience in Perl or Python
- Excellent debugging and analytical skills
- Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
- Strong communication and collaboration skills to interact within the team and across functional teams
If you have previous experience automating tasks in the design verification process, hands-on experience in object-oriented programming, prior design or verification experience at the IP or block level, experience developing methodologies used by others, or demonstrated ability to drive a project to completion, you will stand out from the crowd.