EDA Methodology Architect

We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs.

As a Senior P&R Methodology Architect, you will work directly with core P&R engine developers to define real-world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability.

Key responsibilities include:

• Defining and rolling out next-gen flows, including refactoring legacy flows and consolidating ad-hoc solutions into scalable, maintainable frameworks used across multiple design teams.

• Designing and running rigorous A/B and multi-variant experiments to compare flows, engines, and tool settings. Developing Python-based analytics and ML/GenAI techniques to mine large QoR datasets, recommend flow settings, and automate analysis.

• Performing deep root-cause analysis on QoR issues across engines, tools, and flows, and driving methodologies to resolve the 'long tail' of timing closure and performance limiters.

• Partnering with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge.

• Driving aggressive PPA and schedule targets and the adoption of new tools and flows across the company.

Requirements include:

• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.

• 8+ years physical design experience, with deep expertise in industry standard tools like ICC2/Innovus, PrimeTime/Tempus, etc.

• Extensive hands-on P&R experience taking complex blocks or chips to tape-out with aggressive PPA targets.

• Proven skills in Python, Perl, and TCL flow development.

• Strong problem-solving skills and self-motivation, demonstrated by simplifying complex, cluttered environments and modernizing legacy tools and processes.

• Excellent communication and collaboration skills, with a track record of driving consensus and solving complex issues across distributed design, CAD, and R&D teams.

Preferred qualifications include:

• Experience collaborating with EDA or internal R&D teams on core engine development, co-defining features, developing benchmarks and leading validation and deployment.

• Expertise in designing and automating A/B tests and large-scale regressions, and analyzing large QoR datasets to understand trends and drive root-cause analysis.

• Background in advanced-node and large-scale designs with exposure to advanced-node challenges (DFM, variability, EM/IR, power integrity).

• Hands-on experience applying AI/ML or GenAI to physical design, QoR analysis, or flow development will be a strong plus.