Senior Verification Engineer - Hardware

NVIDIA is seeking a Senior Verification Engineer for its Emulation division in Santa Clara, CA. The engineer will work on emulation environments, bring up SOCs on emulation, and collaborate with various teams.

Key Responsibilities:

• Support multiple emulation environments using the latest techniques such as C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, and Accelerated UVM Testbenches.
• Bring up SOCs on emulation, root cause SoC/Processor test fails, and resolve emulator environment issues.
• Collaborate continually with Design, DV, Power, Silicon Validation, Performance, and Software teams.
• Lead emulation vendors to debug issues using various tools.

Requirements:

• Master's degree or equivalent in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
• At least 3 years of proven experience.
• Proficiency in Verilog and/or VHDL, C/C++, and SystemVerilog.
• Essential experience with UVM verification environments and scripting with Perl, Python, and C/C++.
• Familiarity with hierarchical design approaches, top-down design, SoC, and system-level verification.
• This role is based on-site at NVIDIA's Santa Clara, CA office.

NVIDIA offers highly competitive salaries and a comprehensive benefits package, including eligibility for equity.