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Synopsys

Applications Engineering, Sr Engineer (C++/ Verilog)

Synopsys
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onsite senior full-time Hyderabad

First indexed 8 May 2026

Description

Join us to transform the future through continuous technological innovation.

As an experienced Verification Engineer, you will be verifying and deploying emulation models for Zebu, focusing on bus protocols like PCIe, USB, CSI, and DSI. You will implement designs in C++, RTL, and SystemVerilog-DPIs, collaborating with cross-functional teams to ensure seamless SoC bring-up and software development in pre-silicon environments. You will create and optimize use models and applications for various emulation projects, conducting thorough verification and validation processes to ensure the highest quality of emulation models.

Enhance the efficiency and effectiveness of our emulation models, significantly reducing time-to-market for new technologies. Contribute to the development of high-performance silicon chips that power a wide range of applications, from consumer electronics to advanced computing systems. Ensure the reliability and robustness of our verification processes, thereby improving the overall quality of our products.

Key Responsibilities:

  • Verifying and deploying emulation models for Zebu, focusing on bus protocols like PCIe, USB, CSI, and DSI.
  • Implementing designs in C++, RTL, and SystemVerilog-DPIs.
  • Collaborating with cross-functional teams to ensure seamless SoC bring-up and software development in pre-silicon environments.
  • Creating and optimizing use models and applications for various emulation projects.
  • Conducting thorough verification and validation processes to ensure the highest quality of emulation models.

Requirements:

  • Strong programming skills in C++ and a solid understanding of object-oriented programming concepts.
  • Proficiency in HDL languages such as System Verilog and Verilog.
  • Familiarity with digital design concepts and verification methodologies.
  • Experience with scripting languages like Perl or TCL is a plus.
  • Knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART is advantageous.

Ideal Candidate:

  • Having a B. Tech/M. Tech in EEE/ECE/ETE/VLSI engineering degree with 2-4 years hands-on experience in emulation/simulation.
  • Knowledgeable on areas like Synthesis, Simulation, Verification, place and route with FPGA.
  • Knowledgeable and experience on Hardware emulation tool or experience in verification technology, testcase creation, simulation using VCS or other simulators, debugging with Verdi.
  • Excellent communication skills and a team-oriented mindset.

Our Emulation Transactor Verification Team is dedicated to validating state-of-the-art emulation models and solutions. We specialize in bus protocol verification and work closely with various teams across the organization to ensure the highest quality in our products.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/hyderabad/applications-engineering-sr-engineer-c-verilog/44408/94764583808