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NVIDIA

Principal Chip Lead, Silicon Co-Design Group

NVIDIA
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hybrid senior full-time Santa Clara, CA

First indexed 28 Jul 2026

Description

The Silicon Co-Design Group (SCG) at NVIDIA is seeking a Principal Chip Lead to serve as the technical lead for one of its most significant silicon programs. This role involves partnering across design, validation, software, and manufacturing to keep the program's technical narrative clear and on track.

Responsibilities:

  • Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs.
  • Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution.
  • Help resolve the program's hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging.
  • Steward the qualification playbook and guide mitigations when the playbook does not fit a situation.
  • Shape the program's technical narrative by surfacing key risks, trade-offs, and mitigations as decision-ready options for executive leadership.
  • Mentor Chip Leads on adjacent silicon programs and contribute to SCG-wide methodology through post-mortems and write-ups.
  • Lead the program's Critical Debug and SCG Technical Execution forums, and represent the chip externally with early insight into technical risks.

Requirements:

  • BS or MS (or equivalent experience) in Electrical or Computer Engineering, plus over a decade of proven track record in post-silicon bring-up, validation, or system integration leadership at a major semiconductor company.
  • 15+ years of experience.
  • Strong end-to-end understanding of SoC and ASIC architecture, with recognized expertise in at least one subsystem such as HBM, SerDes, power and thermal, or packaging.
  • Specific examples of silicon-level impact, such as faster bring-up, fewer escapes, yield recovery, or methodology contributions.
  • A track record of guiding technical decisions across functional boundaries without direct reporting authority, and translating sophisticated silicon issues into clear options for executive audiences.

Benefits:

  • Equity
  • Benefits package