Senior DFT Power Methodology Engineer

As a Senior DFT Power Methodology Engineer at NVIDIA, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas.

Your responsibilities will include:

• Developing groundbreaking low power & thermal solutions for manufacturing tests
• Partnering with multi-functional teams to implement brand-new methodologies
• Working on post-silicon data analysis for power to architect next-gen solutions
• Helping develop and deploy DFT methodologies using Applied ML & Gen AI solutions
• Mentoring junior engineers on test designs and trade-offs

Requirements:

• BSEE (or equivalent experience) with 12+, MSEE with 10+, or PhD with 6+ years of experience in DFT design & power
• Understanding of fundamental DFT topics and VLSI areas of power, timing & voltage noise
• Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus
• Experience in application of AI for EDA-related problem-solving is a plus
• Excellent knowledge in using statistical tools for data analysis & insights
• Good exposure to multi-functional areas including RTL & clocks design, STA, place-n-route and power
• Experience in Silicon debug and bring-up on the ATE or SLT platforms

NVIDIA offers highly competitive salaries and a comprehensive benefits package, including equity and benefits.