Emulation and Prototyping Engineer

NVIDIA is seeking an Emulation and Prototyping Engineer to join our Emulation team.

The successful candidate will work on building FPGA prototypes and hardware emulation environments for our next-generation GPUs, SOCs, NICs, and Switches.

Key Responsibilities:

• Building FPGA prototypes and hardware emulation environments by making RTL FPGA/emulation-friendly, partitioning the design, and taking it through synthesis, place-and-route, and emulator compilation flows.
• Improving performance of FPGA prototypes and emulation platforms, analyzing timing/performance bottlenecks, and generating bitstreams/images.
• Bringing up designs on FPGA prototyping and hardware emulation platforms and driving complex debug and problem-solving activities.
• Releasing prototypes and emulation environments to internal customers and supporting them through debug, validation, and software enablement.
• Understanding the design and implementation, defining configurations, developing/modifying bring-up and testing infrastructure, and verifying correctness of the design.
• Working closely with architects, designers, verification engineers, validation teams, and software teams to accomplish project goals.

Requirements:

• B.S. or M.S. in EE, CS, or CE with 3+ years of experience in FPGA prototyping and/or hardware emulation.
• Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
• Hands-on experience with Synopsys ProtoCompiler or Synplify Premier, Xilinx Vivado, and familiarity with emulation platforms such as Synopsys ZeBu or Siemens Veloce.
• Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
• Knowledge of Verilog, SystemVerilog, and digital design concepts.
• Understanding of industry-standard protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency.

Desired Skills:

• Scripting knowledge (Perl/shell/Tcl/Python).
• Good documentation, communication, and interpersonal skills.
• Experience with memory bring-up of LPDDR5/6, DDR5/6, CXL/PCIe, and/or high-speed interfaces such as USB4/3.