Description
We are seeking an experienced Application Engineering, Sr Staff Engineer - Runset Development to join our team. As a key member of our Physical Verification group, you will be responsible for developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool.
This role requires close collaboration with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. You will also be responsible for automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.
In addition, you will troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. You will interface directly with customers and Field Application Engineers (FAEs) to gather requirements, provide technical support, and ensure successful deployment of PV solutions.
As a mentor and team player, you will guide junior team members, share best practices, and contribute to a knowledge-sharing culture within the team. You will stay up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys' technical edge.
The ideal candidate will have a strong foundation in Electronics or VLSI, with 8-10 years of hands-on experience in the Physical Verification (PV) domain. You will have advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS, as well as strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.
If you are a collaborative team player with excellent communication skills, a passion for continuous learning and innovation, and a commitment to delivering high-quality solutions on time, we encourage you to apply for this exciting opportunity.