Description
We are looking for an ASIC Clocks Design Engineer to join our team. As a Clocks team member, you will be responsible for architecting the clock domain to satisfy functional, physical, and testing design requirements. You will engage with multiple teams and design the GPU or CPU clocks to satisfy all the architectural/design/physical constraints.
Improving Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization, and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborating with Physical design and timing team to evaluate Clocking concerns and develop solutions for supporting high-speed Clocking.
Delivering clock RTL information to GPU, CPU, and SOC verification team, timing, and DFT teams.
Getting involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks, and all the way to Silicon bringup.