Senior ASIC Verification Engineer

We are looking for a Senior ASIC Verification Engineer to help verify our global IP. This position offers an opportunity to impact an array of products while collaborating with teams from design, architecture, verification, and integration.

In this role, you will partner with the design and architecture teams to help make the right implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off design or both functional correctness and for meeting performance expectations. This position offers the opportunity to have a real impact on multiple product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI!

Responsibilities:

• Develop test plans, tests and verification infrastructure for verifying global IP across multiple products
• Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify generated RTL
• Ensure code and functional coverage of all the RTL which you will verify
• Build verification components using SV/UVM methodology
• Driving coverage-based verification closure
• Collaborate with design teams across NVIDIA to find corner cases and resolve verification related issues

Requirements:

• BS/MS in Electrical or Computer Engineering (or equivalent experience)
• 5+ years of proven design verification experience
• Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
• Programming and scripting experience in Perl or Python
• Excellent debugging and analytical skills
• Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong communication and collaboration skills to interact within the team and across functional teams

Benefits:

• Eligible for equity
• Benefits package