Senior ASIC Design Engineer

We are looking for an outstanding Senior ASIC Design Engineer to build and implement leading SoCs and GPUs. This role offers a chance to create real impact in a dynamic, tech-driven company. The products range from consumer graphics to self-driving cars and the fast-growing field of artificial intelligence.

As a key member of our design team, you will be responsible for the micro-architecture and build implementation of NOC/interconnect Xbar. You will work closely with verification engineers to deliver a fully verified build and ensure a synthesis/timing clean build to guarantee a routable and physically implementable design.

Key responsibilities include:

• Designing micro-architect features to meet area, performance, and power requirements
• Collaborating with architects, verification engineers, software engineers, and physical build engineers to accomplish your goals
• Delivering a fully verified build by working closely with verification engineers
• Delivering a synthesis/timing clean build to ensure a routable and physically implementable design

Requirements include:

• Bachelor's or Master’s Degree in Electrical Engineering or Computer Engineering, or equivalent experience
• 8+ years of build/RTL experience working on complex units in xbar/memory system
• Highly proficient in logic design, Verilog and/or System-Verilog, with a solid understanding of Computer Architecture and Digital Systems build
• A deep understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis, ECO, and post silicon debug
• Strong interpersonal and communication skills to collaborate across teams
• Prior experience building arbiters, scheduling, synchronization, bus protocols, interconnect networks and/or switches
• Familiarity with architecture concepts and implementation of arbitration policies, interconnection routing policies/deadlock avoidance, and virtual channels
• Good debugging and analytical skills

You will also be eligible for equity and benefits.