ASIC Verification Engineer - Clocks

The System ASIC Verification team at NVIDIA is seeking an excellent ASIC Senior Verification Engineer to drive high-quality, robust verification of system-level IP across unit, subsystem, and SoC levels.

This role is ideal for someone passionate about ground-breaking hardware, sophisticated verification methodologies, and crafting the future of computing. Come join the team and see how you can make a lasting impact on the world.

Responsibilities:

• Play a key role in the System ASIC verification team, helping verify critical system ASIC features such as Fuses, In-system measurement blocks.
• Develop comprehensive test plans, implement tests, and apply robust verification strategies to validate microarchitecture and design functionality.
• Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM.
• Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure.

Requirements:

• M.Tech. (or equivalent) in VLSI or Electronics Engineering with 1+ years of relevant industry experience OR B.Tech with 2+ years of experience in a similar domain.
• Proven experience in unit, sub-system or SoC Level Verification.
• Hands-on expertise in building and maintaining testbench environments for both unit and system-level verification.
• Proficiency in Python or industry-standard scripting languages for automation and test development.
• Strong debugging and analytical skills.
• Familiarity with industry-standard design and verification tools like VCS, Xcelium, etc.
• Solid understanding of RTL Design Principles and Verilog.
• Experience with UVM (Universal Verification Methodology) is a strong plus.
• Excellent communication & collaboration skills, with ability to work effectively across multi-functional teams.

Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package.