Senior Performance Modeling Engineer

NVIDIA networking is a world-leader in building the most powerful supercomputers in the world, which drive the AI and HPC industry. These rely on high performant network switch ASICs which connect GPUs and CPUs at scale for efficient data transfer and compute.

As a Senior Performance Modeling Engineer, you will join the team and shape, optimize, and explore our future networking chips and solutions. The role is cross-disciplinary, collaborating with hardware, software, and research teams across the wider NVIDIA. You will lead workgroups towards technical solutions that will influence the heart of cutting-edge networking products.

Responsibilities:

• Thoroughly understand our networking solutions across all performance related aspects
• Develop a C++ simulation model to define and evaluate architectural options for our next generation of networking products
• Understand different trade-offs related to solving performance bottlenecks
• Collaborate and lead technical solutions within architecture, uarch, hardware and software teams
• Analyze and model the communication patterns of key DL, GAI, inference, and training applications
• Explore innovative ideas to improve and optimize our chip systems performance

Requirements:

• BSc/MSc in Computer Science, Electrical Engineering, from a known university
• Experience in Chip design projects, understanding the challenges of HW uarch implementations
• Excellent verbal and written communication skills, orchestrating cross teams activities
• High level of ownership and the ability to drive solutions and initiatives
• Proficiency in C++ and Python
• 5+ years of hands-on experience
• Strong debug skills

Preferred Qualifications:

• Master's degree in Electrical Engineering, Computer Science or related technical field
• Demonstrated ability to innovate and lead new technologies leading to product impact
• Experience with NVLink/Ethernet/IB technologies