ASIC Digital Design, Sr Staff Engineer

We are seeking a highly skilled ASIC Digital Design, Sr Staff Engineer to join our team. As a key member of our team, you will be responsible for designing and developing cutting-edge semiconductor solutions. Your primary focus will be on interpreting SerDes standards and digital, analog, and firmware architecture documents to develop verification environments and regression testcases in MATLAB.

What you'll do

• Interpreting SerDes standards and digital, analog, and firmware architecture documents to develop verification environments and regression testcases in MATLAB;
• Evaluating and troubleshooting digital and mixed-signal circuits to ensure optimal performance and resolve complex design challenges;
• Collaborating with digital, firmware, and analog teams to solve verification challenges and improve design methodologies;
• Adapting and debugging internal verification environments to effectively replicate challenging scenarios;
• Identifying and implementing process improvements to enhance efficiency in design procedures and methodologies;
• Documenting verification environments, plans, and procedures to ensure clear communication and knowledge sharing across teams.

What you need

• 6-10 years of hands-on experience in FPGA design and verification, with a focus on IP-level functional verification;
• Proficiency in Verilog and MATLAB for digital design, verification, and FPGA prototyping with logical synthesis flows;
• Strong programming and scripting skills for test automation and data analytics (Python, C/C++, TCL);
• Strong understanding of digital and mixed-signal circuit evaluation, troubleshooting, and performance optimization techniques;
• Ability to interpret and apply digital architecture and SerDes standards documentation to develop robust verification solutions;
• Excellent technical documentation skills to ensure clear communication and knowledge transfer.