Senior GPU Architect, Deep Learning

The NVIDIA GPU Architecture group is seeking a Senior GPU Architect, Deep Learning to define and drive future GPU architectures for deep learning and accelerated computing.

You will work at the earliest stages of product definition, focusing on architectural features for future GPUs, while contributing to microarchitectural direction and tradeoffs.

Key responsibilities:

• Define and architect new GPU hardware features for deep learning and parallel processing workloads.
• Drive microarchitectural exploration across compute pipelines, memory hierarchy, data movement, synchronization, and performance efficiency.
• Analyze workload behavior and translate bottlenecks into architectural requirements and hardware feature proposals.
• Evaluate performance, power, area, complexity, and programmability tradeoffs for new architectural directions.
• Develop and use functional and performance models to study new features and refine the architecture.
• Collaborate with RTL, design, verification, compiler, and software teams to ensure successful execution.
• Create clear architecture specifications, validation plans, and success criteria for defined features.

Requirements:

• BS, MS, or PhD in Computer Science, Electrical Engineering, Computer Engineering, or equivalent experience.
• 12+ years of relevant industry experience in GPU architecture, computer architecture, or parallel processing architectures.
• Strong background in hardware architecture and microarchitecture.
• Experience defining and evaluating architectural features with solid understanding of performance, power, and area tradeoffs.
• Strong programming and scripting skills in C, C++, and Python.
• Experience with architectural modeling, simulation, or performance analysis.
• Background in parallel computing, memory systems, high performance computing, or deep learning acceleration.

Preferred qualifications:

• Deep understanding of modern GPU architecture and interaction with AI workloads.
• Experience with memory subsystem architecture, interconnects, coherence, scheduling, or execution pipelines.
• Experience with pre-silicon performance studies, workload characterization, and architectural correlation.
• Familiarity with training and inference behavior for large-scale deep learning models.
• Experience with silicon bring-up, debug, or post-silicon analysis.