Description
As a System Speed Features Engineer, you will co-design system-level speed features, build the validation and automation infrastructure to characterize them, and lead debug of the complex silicon issues that stand between a program and on-time shipment.
Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products.
Define System level specifications, margins, bounding box constraints that satisfy design expectations and product quality.
Provide system requirements for hardware and features affecting speed and reliability, from pre-silicon through productization.
Translate hardware features and architectural requirements into validation techniques that achieve full coverage across testing flows.
Perform closed loop validation by correlating silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs.
Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency.
Design and implement automation tools for system speed modeling; apply AI and LLM-assisted workflows (e.g., automated log analysis, pattern detection, scripting acceleration) to compress characterization and debug cycles.
Architect and influence testability features critical to performance, power, and reliability in partnership with design, DFx, and ATE teams.
Lead debug of complex silicon and system-level issues, including show-stopper defects, to enable on-time product shipment.