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Synopsys

Senior Engineer – Memory Interface Circuits

Synopsys
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onsite mid full-time $100,000 - $150,000 per year Bengaluru

First indexed 24 Apr 2026

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 1–3 years of experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies. Your curiosity drives you to stay current with industry standards, including JEDEC requirements for DDR interfaces, and you are enthusiastic about mastering new methodologies and tools. You value quality and efficiency, consistently delivering robust designs that meet rigorous specifications. Your communication skills enable you to articulate technical concepts clearly and foster productive relationships within cross-functional teams. You are detail-oriented, self-motivated, and embrace opportunities to learn and grow. Whether tackling circuit design tasks or collaborating with system engineers, you demonstrate adaptability, integrity, and a commitment to excellence. Your proactive approach, analytical mindset, and willingness to take initiative make you an invaluable contributor to the team. If you are excited about working on cutting-edge memory interface solutions and contributing to the next generation of high-performance chips, Synopsys is the place for you.

Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

Accelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys’ leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/bengaluru/senior-engineer-memory-interface-circuits/44408/93979726512