Description
You will be a High Speed IP PHY Applications Principal Engineer / Manager at Synopsys, the leader in engineering solutions from silicon to systems.
Your role will involve providing technical support to customers integrating DesignWare USB Mixed Signal PHY IP, troubleshooting customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing in USB PHY and SoC integration contexts.
Key responsibilities include:
- Providing technical support to customers integrating DesignWare USB Mixed Signal PHY IP
- Troubleshooting customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing
- Guiding customers through USB 2.0, USB 3.x, and Type-C implementation considerations and design tradeoffs
- Collaborating closely with the Korea AE team and Synopsys R&D and product teams to escalate complex issues
- Delivering technical presentations and integration best practices to customer engineering teams
- Traveling occasionally to customer sites across Korea and the region to support critical milestones
The impact you will have includes:
- Enabling customer success on high-stakes tapeouts by resolving USB PHY integration issues
- Reducing time-to-silicon by providing clear, actionable guidance during integration, constraints closure, and silicon bring-up
- Building deep technical relationships with leading semiconductor companies in Korea
- Shaping future IP releases by channeling real customer pain points back into the product team
Requirements:
- Bachelor's or Master's in Electrical Engineering or Computer Engineering with 10 to 20+ years of ASIC design, verification, or SoC integration experience
- Strong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing
- Ability to work independently and drive ambiguous, customer-driven issues to resolution
- Excellent communication skills in Korean and English
- USB 2.0, USB 3.x, Type-C, or USB PHY integration experience is a strong plus
- Broader high-speed interface background (e.g., MIPI, PCIe, HDMI) is a plus
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://careers.synopsys.com/job/yongin-si/high-speed-ip-phy-applications-principal-engineer-manager/44408/95924563824