Description
We are seeking a Systems Level Test (SLT) Engineering Manager to lead the development of manufacturing test solutions for system-level products within the Test Solutions Group at NVIDIA. You will guide engineers in driving solutions that have a lasting impact on processes and methodologies. Your responsibilities will include:
- Driving custom SLT development to optimize system performance, power efficiency, and test coverage.
- Developing and integrating test flows, scripts, and automation to ensure robust SLT coverage.
- Defining SLT manufacturing solutions and translating them into methodologies and processes applicable across GPU and Data Center product segments.
- Developing test strategies for new product features, including identification, specification, design, and qualification of test fixtures, test equipment, and diagnostic software.
- Supporting the development of test content and solutions in Python.
- Collaborating with internal and external partners to debug SLT issues.
- Investigating and introducing new manufacturing test technology and methodology to improve production efficiency.
- Leading and advising a team of engineers to coordinate a product line.
- Guiding teams in resolving technical problems.
To qualify, you should have:
- 7+ years of demonstrated ability with post-silicon validation experience in System or Board-related products.
- 3+ years of management experience or leading technical teams and projects.
- A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience with designing and implementing test plans for hardware products.
- Experience working with manufacturing test programs at the boards or systems level.
- Proficiency in Python programming and bash scripting.
- Excellent leadership, communication, and collaboration skills.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Manager--System-Level-Test-Engineering_JR2019112