Product Development Lab Engineer

We are looking for a hands-on Lab Engineer to lead our ATE lab operations and accelerate our post-silicon validation processes. As the complexity of our Data Center (GPU) and SoC products increases, we need a dedicated professional to execute and support our external lab resources (SPIL), optimize tester utilization, and ensure the smooth execution of Failure Analysis (FA) workflows.

Responsibilities:

• Lead daily operations and resource management at external ATE labs (e.g., SPIL) to ensure engineering test continuity and maximize tester utilization during critical NPI phases.
• Perform comprehensive reject verification (L1/L2) and PFA isolation for Data Center GPU (GB100/GB110) and SoC (T264) projects to accelerate yield learning and DPPM tracking.
• Manage end-to-end logistics for FA chip shipments, including Work Order (traveller) control, remote request execution, part delivery, and strict adherence to ESD safety protocols.
• Partner with internal PDE/PTE teams and external foundry engineering teams through weekly technical sync-ups to align on failure analysis status and test program downloads.
• Optimize technical operations by utilizing and verifying FA automation tools (e.g., EDF to Log extractors, Bitmap SEFA flows) across SMT7 and SMT8 platforms.

Requirements:

• Bachelor’s degree in Electrical Engineering, Electronic Engineering, Computer Science, or a related field, or equivalent experience.
• 3+ years of experience in Semiconductor Lab management, ATE testing operations, or Product Engineering support.
• Proven expertise in coordinating with external OSATs or ATE labs, with a deep understanding of SPIL or similar foundry operational environments.
• Strong foundational knowledge of ATE analysis, Failure Analysis (EFA/PFA) workflows, and the ability to interpret complex test logs or Shmoo plots.
• Proficiency in communication for cross-functional collaboration and the ability to manage dynamic hardware logistics in a fast-paced NPI environment.