Staff, Analog Mixed Signal Layout Design and Methodology Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

As a Staff, Analog Mixed Signal Layout Design and Methodology Engineer, you will be responsible for creating and optimizing analog mixed signal layouts with a focus on device matching, EMIR awareness, and parasitic minimization using Custom Compiler SDL or Virtuoso XL. You will also own top-down macro floor planning and drive layout from concept to sign-off, coordinating with circuit designers and verification teams.

Key responsibilities include:

• Creating and optimizing analog mixed signal layouts with a focus on device matching, EMIR awareness, and parasitic minimization using Custom Compiler SDL or Virtuoso XL
• Owning top-down macro floor planning and driving layout from concept to sign-off, coordinating with circuit designers and verification teams
• Running and resolving DRC, LVS, Antenna, DFM, and other physical verification checks, making layout choices that reduce rework later
• Performing PERC verification for ESD and latch-up, proactively identifying and fixing risks before tape out
• Use internal AI tools to reduce layout efforts and increase productivity
• Collaborating with layout teams in other geographies, sharing best practices, and keeping everyone moving in the same direction
• Documenting new methodologies and improvements in MS Word and PowerPoint, making sure the team can repeat and scale what works
• Automating layout and verification flows through scripting in partnership with the automation team, enabling engineers to spend more time solving problems and less time on repetitive tasks

Requirements include:

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Science or other related field, with 5+ years of relevant experience
• Demonstrated expertise in analog mixed signal layout, with hands-on experience in device and signal matching, EMIR, and parasitic optimization
• Proficiency with custom layout tools such as Custom Compiler SDL or Virtuoso XL
• Solid command of DRC, LVS, Antenna, DFM, and other physical verification processes
• Experience with PERC verification for ESD and latch-up; you know what to look for and how to fix it
• Ability to own and floorplan top-down macros, coordinating layout from high-level architecture to final sign-off
• Scripting skills in TCL, Perl, or Python to automate tasks and improve flows is a plus
• Experience creating clear methodology documentation using MS Word and PowerPoint is a plus

Impact:

• Deliver layouts that pass verification the first time, cutting down on iteration cycles and speeding up tape out schedules for the whole team
• Raise the bar on device matching, EMIR, and parasitic performance, improving silicon yield and reliability for every project you touch
• Reduce post-layout surprises by building ESD and latch-up protection into the design, not after the fact
• Streamline global team workflows by sharing automation and documentation that actually gets used
• Push the quality of the overall design process, leaving a trail of improvements and higher standards for others to build on

Who we are looking for:

• You anticipate layout risks and solve them before they become problems in silicon
• You collaborate with global teams and can get alignment even when everyone is remote
• You write down what works, share it, and make sure it’s repeatable for others
• You find ways to automate the drudge work, freeing up time for real engineering
• You explain layout tradeoffs clearly, whether in a meeting or in a slide deck
• You care about the details, but you don’t lose sight of the bigger project goals

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family
• In addition to company holidays, we have ETO and FTO Programs
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
• Save for your future with our retirement plans that vary by region and country
• Competitive salaries