Description
NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify next-generation SoC and IP solutions. The engineer will play a key role in verifying the correctness, performance, and compliance of on-chip fabrics and interconnect subsystems.
Job Overview: As a Senior Custom SOC/IP Verification Engineer at NVIDIA, you will be responsible for ASIC design verification of fabric and interconnect IP blocks as well as full chip integration. This involves covering DMA, routing, arbitration, ordering, flow control, and protocol compliance.
Key Responsibilities:
- Develop and implement test plans for fabric and interconnect verification of SoCs using UVM-based environments.
- Design and implement constrained-random and directed SystemVerilog testbenches targeting interconnect fabrics, network-on-chip (NoC) topologies, and multi-agent SoC integrations.
- Collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right verification plans and execution.
- Drive the development of silicon and platform verification strategies and methodologies for fabric and interconnect subsystems.
Requirements:
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
- 6+ years of experience in ASIC verification, with a strong focus on fabric, interconnect, or network-on-chip verification at both IP and full chip levels.
- Strong knowledge of SystemVerilog and UVM methodology.
- Hands-on experience with industry-standard interconnect and bus protocols (e.g., AMBA AXI, CHI, or equivalent).
- Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs.
- Proficiency in scripting languages (Python, Perl, TCL).
Benefits: NVIDIA offers highly competitive salaries and a comprehensive benefits package. You will also be eligible for equity and benefits. For more information, visit www.nvidiabenefits.com/