Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
As a Senior/Staff Design Verification Engineer, you will partner with digital design teams to verify mixed-signal PHY IPs, write testcases and execute functional verification plans and test cases, run RTL and gate-level simulations using UVM, debug failures with waveform analysis, and perform code coverage analysis.
The impact you will have includes improving silicon reliability by catching issues early, delivering reusable UVM testbenches that make verification faster, helping teams hit performance and power targets with real data, and sharing clear debug findings that move projects forward.
To succeed in this role, you will need 2+ years design verification experience, good RTL and gate-level simulation and debugging skills, hands-on with UVM verification, and high-speed protocol knowledge (DDR, HBM, PCIe).
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs, including competitive salaries, comprehensive medical and healthcare plans, time away programs, family support, ESPP, and retirement plans.