New The Skills of Tomorrow: how AI-exposed is every skill in 2026? See the data →
Synopsys

Lead RTL Design Engineer

Synopsys
onsite senior full-time $120,000 - $180,000 per year Bengaluru
Apply →

First indexed 24 Apr 2026

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

As a Lead RTL Design Engineer, you will be responsible for leading RTL design and implementation for high-performance mixed signal IPs including UCIe, DDR, and Die-to-Die interfaces. You will take technical ownership of assigned blocks, developing architecture and microarchitecture, and driving design reviews.

Key responsibilities include:

  • Leading RTL design and implementation for high-performance mixed signal IPs
  • Taking technical ownership of assigned blocks, developing architecture and microarchitecture, and driving design reviews
  • Specifying, architecting, and implementing digital logic using Verilog/SystemVerilog
  • Collaborating with circuit design, verification, physical design, and validation teams to ensure design closure and integration
  • Driving logic synthesis, lint, clock domain crossing (CDC), design-for-test (DFT), and timing closure for your blocks
  • Analyzing coverage, debugging functional and timing issues, supporting integration, and authoring technical documentation

In this role, you will contribute to Synopsys' reputation as a leader in advanced semiconductor design solutions. You will drive innovation in digital design and architecture, influencing key product features and capabilities. You will ensure the delivery of high-quality, reliable, and scalable IPs that meet stringent market requirements.

As a leader, you will foster a culture of continuous learning, inclusivity, and creative thinking, empowering your peers and advancing the team's collective success. You will be motivated by working on cutting-edge IPs such as UCIe, DDR, and Die-to-Die interfaces, and you will stay current with industry trends and emerging technologies, including AI/ML.

You will join a dynamic, high-performing engineering team at Synopsys Bangalore, focused on designing and delivering advanced mixed signal IPs for leading-edge semiconductor applications. The team prides itself on technical excellence, collaboration, and innovation, working closely with global counterparts across design, verification, and product engineering.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/bengaluru/lead-rtl-design-engineer/44408/93647959712