Description
We are seeking a Staff Memory Layout Engineer to join our team. As a Staff Memory Layout Engineer, you will be responsible for leading the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels.
What you'll do
- Lead the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels
- Ensure compliance with foundry process design rules (DRC/LVS) and memory-specific constraints
What you need
- Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related fields
- Minimum of 5 years of experience in layout design
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://careers.synopsys.com/job/da-nang/staff-memory-layout-engineer-in-da-nang/44408/91391710096