Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions aws Designing high-performance digital logic for Die to Die IP Collaborating across teams on PHY and controller designs Optimizing IP for performance, power, and area Participating in the full Hard IP design cycle Providing technical guidance to junior engineers Staying current with industry trends
Driving world-class D2D IP development Shaping semiconductor technology's future Ensuring high-quality IP delivery Enhancing Synopsys IP adoption Mentoring engineers globally Strengthening Synopsys' leadership
Expertise in SerDes, DDR/HBM, or UCIe PHY Hard IP design experience Proficiency in SystemVerilog Strong RTL-to-gate design flow knowledge Excellent problem-solving and communication skills
Collaborative and inclusive Analytical and detail-oriented Effective communicator Mentor and leader
Join a diverse, world-class engineering team focused on high-speed Die to Die IP innovation in a global, matrixed environment.
We offer comprehensive health, wellness, and financial benefits. Your recruiter will share more about salary and perks during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.