Description
Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally. At Synopsys, interns dive into real-world projects, gaining hands-on experience while collaborating with our teams worldwide,and having fun in the process! You'll have the freedom to share your ideas, unleash your creativity, and explore your interests. This is your opportunity to bring your solutions to life and work with cutting-edge technology that shapes not only the future of innovation but also your own career path.
Job Description:
As an intern in the Analog Design Engineering team, you will design, verify, and validate high-performance, high-speed analog circuits, focusing on next-generation Phase Lock Loops (PLLs) and related blocks for world-leading SOCs in advanced CMOS technologies. You will participate in the design of Delay Locked Loops (DLL), phase mixers, and custom digital blocks used in SERDES interfaces. You will contribute to test bench creation, specification generation, analog circuit design, and layout optimization. You will assist with documentation, design debugging, and silicon evaluation to ensure robust and reliable circuit performance. You will engage with cross-functional teams, sharing ideas and collaborating to solve complex engineering challenges.
Requirements:
- Currently pursuing a university degree in Electronics Engineering or related field.
- Understanding of CMOS technologies; experience with analog and mixed-signal IC design is a plus.
- Strong written and verbal communication skills, problem-solving ability, and organizational skills.
- Ability to work collaboratively and build relationships within a team environment.
Program Facts:
- Program Length: 8 weeks
- Location: Gdansk, Poland
- Working Model: Onsite working
- Full-Time
- Start Date: July 2026