Firmware Design Engineer, Sr. Staff

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

We are seeking a skilled Firmware Design Engineer to join our team. As a Firmware Design Engineer, you will be responsible for designing, implementing, and validating firmware for embedded microprocessors in advanced SerDes and PHY IP.

Key Responsibilities:

• Architect, implement, and validate firmware for embedded microprocessors in advanced SerDes and PHY IP.
• Lead silicon bring-up and debug cycles, supporting lab triage, instrumented root-cause analysis, and cross-functional closure with design, DV, validation, and applications teams.
• Apply mixed-signal debugging expertise to isolate HW/FW boundary issues, leveraging knowledge of analog behavior, clocks/resets, power states, and link training.
• Develop high-quality embedded code in C/C++, ensuring robust design reviews, code reviews, unit testing, and disciplined defect prevention practices.
• Scale automation through CI/CD pipelines using Jenkins and test frameworks to improve coverage, reliability, and release confidence.
• Define validation strategies, create automated test cases, and drive coverage analysis across multiple firmware projects.
• Build and maintain AI-assisted firmware workflows using tools such as Cursor, focusing on prompt/trace hygiene, guardrails, and verification practices.
• Operationalize agentic AI patterns for firmware development, including planning, code generation, refactoring, test creation, log triage, and regression analysis with explicit human review points.
• Author and curate reusable rules, skills, and commands to standardize AI usage (coding standards, spec templates, “definition of done,” test expectations, and safety checks).
• Lead process maturity initiatives, driving adoption of coding standards, branching/release hygiene, documentation quality, and review discipline, making adherence measurable.
• Operationalize status and quality tracking via JIRA dashboards and Confluence, providing clear, repeatable reporting on best-practice and AI-workflow adoption.
• Mentor and provide technical leadership, elevating team capability through coaching, review guidance, and hands-on problem solving in critical debug cycles.

Requirements:

• Embedded firmware experience: 5+ years building and debugging embedded firmware for silicon products (bring-up, lab debug, sustained maintenance).
• Programming: Expert in C/C++; strong scripting proficiency in Python (plus Bash and/or Tcl).
• Debug: Demonstrated strength in silicon bring-up, lab instrumentation, and HW/FW boundary root-cause analysis.
• Mixed-signal systems: Practical experience debugging systems involving analog and digital behavior (SerDes/PHY, clocking, resets, power, signal integrity impacts).
• Validation and automation: Proven ability to build automation, test frameworks, and coverage strategy; experience with Jenkins CI/CD.
• AI tooling: Hands-on experience using Cursor (or equivalent) in production engineering workflows, including building reusable prompts/workflows and enforcing verification/quality gates.
• Agentic workflows: Experience defining agentic workflows with clear boundaries, review points, and safety rails (including when not to use AI).
• Process leadership: Track record of scaling best practices across a team (reviews, test discipline, release hygiene, documentation standards).
• Collaboration: Strong cross-functional communication across firmware, hardware/design, DV/validation, and multi-site teams.
• Education: BSEE/MSEE (or equivalent practical experience).

We offer a competitive salary and benefits package, as well as opportunities for professional growth and development.