Description
We are seeking an experienced engineer with a passion for solving complex technical challenges and a deep interest in shaping the future of semiconductor design. As a Sr Staff Engineer, you will be responsible for designing and analysing algorithms for end-to-end timing constraint management across the Synopsys flow. You will also drive the success and evolution of Synopsys' constraint flow and tools, enhancing product performance and integration.
Key responsibilities include:
- Designing and analysing algorithms for end-to-end timing constraint management across the Synopsys flow.
- Driving the success and evolution of Synopsys' constraint flow and tools, enhancing product performance and integration.
- Collaborating within a highly skilled engineering team to deliver innovative solutions for static timing analysis (STA) during design and optimisation.
- Designing, developing, troubleshooting, and debugging advanced software programs for constraint generation and verification.
- Architecting, developing, and testing constraint management solutions, contributing to the advancement of R&D software development.
As a member of our team, you will have the opportunity to work on cutting-edge projects, collaborate with talented engineers, and contribute to the development of innovative solutions. You will also have access to professional development opportunities, competitive compensation, and a comprehensive benefits package.
To be successful in this role, you will need to have a strong foundation in programming fundamentals, including data structures, sorting, searching algorithms, and numerical methods. You should also have experience with C/C++, scripting languages, and a keen eye for detail. Additionally, you should be able to communicate effectively with cross-functional teams and have a strong understanding of software development principles and practices.
If you are a motivated and experienced engineer looking for a challenging and rewarding opportunity, please apply today!