Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
As a Principal ASIC Design Verification Engineer, you will be responsible for developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products. You will write and maintain advanced testcases using SystemVerilog and UVM methodologies to ensure thorough coverage and robust verification.
You will also debug and analyze complex testbench and design-related issues, collaborating closely with design and mixed-signal engineering teams. Additionally, you will automate verification flows and processes using scripting languages such as Python or Perl to enhance productivity and coverage.
To be successful in this role, you will need to have a strong understanding of digital circuit design concepts and principles, as well as proficiency with scripting languages such as Python or Perl. You will also need to be able to work independently and as part of a team in a dynamic engineering environment.
If you are a highly skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems, we encourage you to apply for this exciting opportunity.