Description
We are seeking a skilled RTL Design Engineer to join our team in Hanoi/Ho Chi Minh City/Da Nang. As a member of our team, you will be responsible for developing specifications and RTL for High Bandwidth Interface PHY IP. You will collaborate with Verification teams to ensure design accuracy and coordinate logic implementation phases across teams. You will also apply scripting skills for design automation and participate in onboarding in Da Nang and transitioning to Hanoi or Ho Chi Minh City.
The successful candidate will have a BS/MS/PhD in Electronics Engineering or Telecommunications and 2+ years of experience in RTL design for ASIC or PHY IP. You will have experience with VCS, Verdi, Spyglass, Perl/TCL/Python and knowledge of clock domain crossing, APB, JTAG. Good English communication skills are essential.
As a member of our team, you will advance industry-leading high bandwidth interface IP, ensure robust design and verification processes, drive innovation in RTL design and workflows, and enhance productivity through automation.