Description
Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.
We are seeking a Senior Engineer to join our R&D engineering team focused on virtual platform development and enhancement using Synopsys Virtualizer. The successful candidate will be responsible for implementing SystemC / TLM2.0 models within the Synopsys Virtualizer environment based on hardware specifications, developing and integrating C++ models for CPUs, interconnects, memories, and peripherals to create comprehensive virtual platforms, configuring and customizing Virtualizer platforms to support early firmware, bootloader development, and Linux/RTOS bring-up, optimizing models and platforms for performance, scalability, and maintainability, integrating virtual platforms with debuggers, build systems, and CI pipelines for seamless software development workflows, utilizing Python for Virtualizer automation, simulation orchestration, and test/regression frameworks, conducting deep root-cause analysis across hardware models and software stacks to ensure robust debugging and system analysis.
The successful candidate will be part of a dedicated R&D engineering team focused on virtual platform development and enhancement using Synopsys Virtualizer. The team collaborates closely with firmware, OS, and hardware groups to enable early software development and system-level debugging. You will work in a supportive, innovative environment that values technical excellence, teamwork, and continuous learning.
The ideal candidate will have a minimum of 2 years of professional experience in virtual prototyping, R&D, and embedded systems, expert-level proficiency in C++ (C++11/14/17 or later) and SystemC (including TLM2.0, model composition, timing, and synchronization), strong Python skills for automation, scripting, and testing, deep understanding of embedded systems architecture (ARM and/or RISC-V processors, memory-mapped I/O, interrupts, DMA, timers, interconnects), excellent command of Linux development and debugging workflows, good software debugging and root-cause analysis skills, fluent English communication skills (written and spoken), military service status: completed or exempted, hands-on experience with Synopsys Virtualizer and knowledge of functional safety standards (e.g., ISO 26262) are assets.